rev. page date rev. page date description: dc-dc converter 1 of 4 06/2010 20050 sw 112 th ave. tualatin, oregon 97062 p h o n e phone 503.612.2300 f a x www.v-infinity.com fax 503.612.2383 part number: vesd2-sip features isolated 2 w output temperature range: -40c~+85c unregulated high efficiency to 82% dual voltage output small footprint sip package style industry standard pinout ul94-v0 package no heatsink required 3k vdc isolation power density 1.42 w/cm3 no external component required low cost description designed to convert fixed voltages into an isolated voltage, the vesd2-sip series is well suited for providing board-mount local supplies in a wide range of applications, including mixed analog/digital circuits, test & measurement equip., process/machine controls, datacom/telecom fields, etc... the semi-regulated output can be followed by 3-terminal regulators to provide output protection, in addition to output regulation. model input voltage output output current package number nominal range voltage max. min. efficiency style vesd2-s5-d5-sip 5 vdc 4.5~5.5 vdc 5 vdc 200 ma 20 ma 82% sip vesd2-s5-d9-sip 5 vdc 4.5~5.5 vdc 9 vdc 111 ma 12 ma 83% sip vesd2-s5-d12-sip 5 vdc 4.5~5.5 vdc 12 vdc 83 ma 9 ma 85% sip vesd2-s5-d15-sip 5 vdc 4.5~5.5 vdc 15 vdc 67 ma 7 ma 85% sip vesd2-s12-d5-sip 12 vdc 10.8~13.2 vdc 5 vdc 200 ma 20 ma 83% sip vesd2-s12-d9-sip 12 vdc 10.8~13.2 vdc 9 vdc 111 ma 12 ma 84% sip vesd2-s12-d12-sip 12 vdc 10.8~13.2 vdc 12 vdc 83 ma 9 ma 86% sip vesd2-s12-d15-sip 12 vdc 10.8~13.2 vdc 15 vdc 67 ma 7 ma 86% sip vesd2-s24-d5-sip 24 vdc 21.6~26.4 vdc 5 vdc 200 ma 20 ma 84% sip vesd2-s24-d9-sip 24 vdc 21.6~26.4 vdc 9 vdc 111 ma 12 ma 85% sip vesd2-s24-d12-sip 24 vdc 21.6~26.4 vdc 12 vdc 83 ma 9 ma 87% sip vesd2-s24-d15-sip 24 vdc 21.6~26.4 vdc 15 vdc 67 ma 7 ma 87% sip
rev. page date description: dc-dc converter 2 of 4 06/2010 20050 sw 112 th ave. tualatin, oregon 97062 p h o n e phone 503.612.2300 f a x www.v-infinity.com fax 503.612.2383 part number: vesd2-sip note: 1. all specifications measured at ta=25c, humidity <75%, nominal input voltage and rated output load unless otherwise specifi ed. output specifications item test conditions min. typ. max. units output power 0.2 1 w line regulation for vin change of 1% 1.2 % load regulation 10% to 100% full load 10 15 % output voltage accuracy see tolerance envelope graph temperature drift @ 100% load 0.03 %/c output ripple/noise 20 mhz bandwidth 50 75 mvp-p switching frequency full load, nominal input (5 v/12 v) 75 khz general specifications short circuit protection <1 second temperature rise at full load 25c max, 15c typ. cooling free air convection operating temperature range -40c to +85c storage temperature range -55c to +125c soldering temperature 300c (1.5mm from case for 10 sec.) storage humidity range <95% case material plastic (ul94-v0) mtbf >3,500,000 hrs. burn-in full load at +85c, for 4 hours at no-load and 4 hours at full load. isolation specifications item test conditions min. typ. max units isolation voltage tested for 1 min. 3,000 v dc insulation resistance test at 500 vdc 1,000 m ambient temperature c 5 6 typical characteristics
rev. page date description: dc-dc converter 3 of 4 06/2010 20050 sw 112 th ave. tualatin, oregon 97062 p h o n e phone 503.612.2300 f a x www.v-infinity.com fax 503.612.2383 part number: vesd2-sip 1 256 7 note: all pins on a 2.54mm pitch; all pin diameters are 0.50mm; all dimensions in mm. side view bottom view layout 1 2 5 6 7 +vin -vin -vout com +vout dimensions (mm)
rev. page date description: dc-dc converter 4 of 4 06/2010 20050 sw 112 th ave. tualatin, oregon 97062 p h o n e phone 503.612.2300 f a x www.v-infinity.com fax 503.612.2383 part number: vesd2-sip application notes: - input filtering to reduce the reflected ripple current and minimize emi, especially when the converter input is more than 2 away from the dc source, it is recommended to connect a low esr electrolytic capacitor between vin and gnd. the values suggested are as shown in table 1. if additional filtering is required, the capacitance may be increased, or expanded to an lc network as shown in figure 1. input voltage external input capacitance 4.7 f 5 v 12 v 2.2 f 24 v 1.0 f table 1 vout external ouput capacitance 4. f 5 v 9 v 2.2 f 12 v 1.0 f 15 v 0.4 f table 2 figure 1 dc c l l dc y c c +vin -vin +vout -vout com _rt qp qp qp qp _rt _rt reg dc dc dc dc reg reg +vin +vin -vin -vin +vout -vout com +vout -vout com - minimum loading during operation, the minimum output load should not be less than 10% of the full load, and this product should never be operated under no load. if the actual output power is very small, please connect a resistor with proper resistance at the output end in parallel to increase the load. - input regulation this converter accepts a narrow input range. with a semi-regulated design, the converters output voltage will also change proportionally with the input voltage. to accept a wider input range and to improve line regulation, an input regulator can be added as shown in fig. 2 - protection the converter has minimal protection against input over- voltage or output over-load, and may be permanently damaged if exposed to these conditions. an input clamping device can be used for input voltage limiting. an input fuse or an output fuse also be used to protect against over-loading. - dual outputs used as a single output the +vout and -vout can be used to obtain a single output that is the sum of the two outputs. in this case, the com pin shouldnt be used. - output regulation an external 3-terminal regulator can be connected to the output of the converter to achieve full regulation. make sure the converters output voltage provides sufficient head room for the regulator. an additional benefit is that the built-in protection features in the regulator, such as ocp, otp, etc, will protect the converter also. in a complimentory supply, a negative output regulator must be used to achieve the negative regulated output. - output filtering an output capacitor is needed to meet output ripple requirements as shown in table 2. output capacitance may be increased for additional filtering, but should not exeed 10 f or expanded to an lc network as in figure 1.
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